基于延迟线内插法的时间间隔测量电路
A Time Interval Measurement Circuit Based on Delay Line Interpolation
DOI: 10.12677/OJCS.2015.41002, PDF, HTML, XML, 下载: 2,987  浏览: 8,339  国家科技经费支持
作者: 张 炜, 吴秋莉, 邓雨荣：广西电网公司电力科学研究院，广西，南宁；黄 钰, 张 春：清华大学微电子所，北京
关键词: 延迟线内插法；时间间隔测量；延时链；Delay Line Interpolation； Time Interval Measurement； Delay Cell
摘要: 在时间同步系统中，时间间隔的测量至关重要。提高时间间隔测量的精度，可以让整个定位系统的定位更精确。延迟线内插法是近年来广泛研究和采用的一种时间间隔测量方法。同时内插法结合电子计数器可以扩大测量量程，从而同时达到高精度、大量程的测量需求。本文针对定位系统时间间隔测量的需求，采用全定制芯片实现方式，在0.18 um COMS工艺下，实现了128级延时单元的延时链，仿真单级延时67 ps，实际测试该芯片的测量精度在1 ns以内。
Abstract: Time interval measurement plays an important role in time synchronization system. Precise time interval measurement can improve the accuracy of positioning system. The delay line interpolation method with electron counter is widely used in recent years, which can meet the need of high accuracy as well as large ranging scale. This paper presents a full custom time interval measure-ment chip based on delay line interpolation circuits in 0.18 um COMS technology to satisfy the time interval measurement needs in positioning system and realizes 128-stage delay units. The simulation accuracy of single delay cell is 67 ps and the actual maximum measurement error is approximately 1 ns.
文章引用：张炜, 吴秋莉, 黄钰, 张春, 邓雨荣. 基于延迟线内插法的时间间隔测量电路[J]. 电路与系统, 2015, 4(1): 8-14. http://dx.doi.org/10.12677/OJCS.2015.41002

参考文献

[1] 安琪 (2006) 粒子物理实验中的精密时间间隔测量. Nuclear Techniques, 6.
[2] Napolitano, P., Moschitta, A. and Carbone, P. (2010) A survey on time interval measurement techniques and testing methods. IEEE Transactions on In-strumentation and Measurement, 181-186.
[3] Ramakrishnan, V. and Balsara, P.T. (2006) A wide-range, high-resolution, compact, CMOS time to digital converter. VLSI Design, 3-7 January 2006, 1063-9667.
[4] Jansson, J.-P., Mäntyniemi, A. and Kostamovaara, J. (2006) A CMOS time-to-digital converter with better than 10 ps single-shot precision. IEEE Journal of Solid-State Circuits, 41, 1286-1296.
[5] Tangudu, J., Gunturi, S., et al. (2009) Quantization noise improvement of time to digital converter (TDC) for ADPLL. IEEE International Symposium on Circuits and Systems (ISCAS), 1020-1023.