SEA  >> Vol. 5 No. 4 (August 2016)

    RISC微处理器设计中流水线数据相关问题研究与实现
    The Research and Implementation of Pipeline Data Dependency in RISC Microprocessor Design

  • 全文下载: PDF(1071KB) HTML   XML   PP.243-253   DOI: 10.12677/SEA.2016.54028  
  • 下载量: 349  浏览量: 963   科研立项经费支持

作者:  

郭艳飞:中国化工油气股份有限公司,北京;
宋丽华,张 胤:北方工业大学计算机学院,北京

关键词:
数据相关RISCCPUData Hazard RISC CPU

摘要:

处理器流水线中的数据相关问题,通常会影响指令执行结果的正确性,并限制处理器性能的发挥。本文首先对流水线数据相关问题的本质及成因进行剖析,并提出解决数据相关的基本原理。依据此原理,并结合两种常用解决方法,流水线暂停法和数据前推法的优点,提出新的解决方案——“最小指令周期写回法”,该方法既灵活又充分节省了硬件资源的消耗,不失一般性,该方法可为解决用于嵌入式设备的RISC微处理器流水线中的数据相关提供参考。

Data dependency in the processor pipeline usually affects the correctness of the results of the instruction execution, and limits the performance of the processor. In this paper, we first analyze the nature and causes of pipeline data dependency, and put forward the basic principle of data dependency. Then combining this principle with the advantages that both of the suspended pipeline method and the data push forward method, we propose a new solution “a minimum instruction cycle writing back method”. The method is flexible and fully saves the consumption of hardware resources. Without loss of generality, the method also can be used for solving the pipeline data dependency problem of the embedded RISC microprocessor.

文章引用:
郭艳飞, 宋丽华, 张胤. RISC微处理器设计中流水线数据相关问题研究与实现[J]. 软件工程与应用, 2016, 5(4): 243-253. http://dx.doi.org/10.12677/SEA.2016.54028

参考文献

[1] 李山山, 刘敬晗. 利用Tomasulo算法处理数据相关的流水线CPU设计[J]. 实验室研究与探索, 2014, 33(12): 90- 95.
[2] Lu, J.J., Zhou, X.F. and Wang, J.Y. (2007) A Novel Dynamic Scheduling Algorithm of Data Hazard for Embedded Processor. Proceedings of the 7th IEEE International Conference on ASIC, Shanghai, 22-25 October 2007, 28-31.
[3] Harris, D.M., Harris, S. L. 数字设计和计算机体系结构(英文版) [M]. 北京: 机械工业出版社, 2008: 401-406.
[4] 郑纬民, 汤志忠. 计算机系统结构(第二版) [M]. 北京: 清华大学出版社, 2014.
[5] 东野长磊. 基于现场可编程门阵列的RISC处理器设计[J]. 计算机工程, 2011, 37(11): 241-243.