基于对偶变量的计算机代数证明的机器检验
Machine Checking for Computer Algebraic Proofs Based on Dual Variables
摘要: 代数推理是目前验证门级整数乘法器最有效的方法之一。实用代数演算是一种涵盖了代数推理并能进行有效证明检验的证明格式。尤其是在代数编码中添加对偶变量生成统一的PAC证明。因为PAC证明文件非常大,且验证过程可能包含错误,本文介绍了一种验证检验器PACHECK2,通过对PAC证明格式进行修改,导出由一系列线性组合组成的证明。进一步识别异或门,分块进行线性组合,减少证明规则的使用,生成简洁的证明。实验表明新的检验器PACHECK2能有效检验证明,验证效率更高,同时提供详细的错误信息。为乘法器的验证提供了一个有效的检验器。
Abstract: Algebraic reasoning is one of the most effective methods to verify gate level integer multiplier at present. Practical algebraic calculus is a proof scheme that covers algebraic reasoning and can perform effective proof checking. In particular, adding dual variables to algebraic coding generates uniform PAC proofs. Because the PAC proof file is very large and the verification process may contain errors, this paper introduces a proof checker PACHECK2. By modifying the PAC proof format, a proof composed of a series of linear combinations is derived. To further identify XOR gates, the linear combination of blocks can reduce the use of proof rules and generate simple proof. The experimental results show that the new checker PACHECK2 can effectively check the proof, the verification efficiency is higher, and at the same time, provide detailed error information. It pro-vides an effective checker for the verification of the multiplier.
文章引用:魏峰玉, 黄怡桐, 刘帅, 江建国. 基于对偶变量的计算机代数证明的机器检验[J]. 应用数学进展, 2022, 11(11): 8191-8199. https://doi.org/10.12677/AAM.2022.1111867

参考文献

[1] Yu, C., Brown, W., Liu, D., Rossi, A. and Ciesielski, M. (2016) Formal Verification of Arithmetic Circuits by Function Extraction. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 35, 2131-2142. [Google Scholar] [CrossRef
[2] Sayed-Ahmed, A., Große, D., Kühne, U., Soeken, M. and Drechsler, R. (2016) Formal Verification of Integer Multipliersby Combining Gröbner Basis with Logic Reduction. Proceedings of the 2016 Conference on Design, Automation & Testin Europe, Dresden, 14-18 March 2016, 1048-1053. [Google Scholar] [CrossRef
[3] Shekhar, N., Kalla, P. and Enescu, F. (2007) Equivalence Verification of Polynomial Datapaths Using Ideal Membership Testing. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 26, 1320-1330. [Google Scholar] [CrossRef
[4] Kaufmann, D., Biere, A. and Kauers, M. (2020) From DRUP to PAC and Back. 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE), Grenoble, 9-13 March 2020, 654-657. [Google Scholar] [CrossRef
[5] Kaufmann, D., Biere, A. and Kauers, M. (2019) Veri-fying Large Multipliers by Combining SAT and Computer Algebra. 2019 Formal Methods in Computer Aided Design (FMCAD), San Jose, 22-25 October 2019, 28-36. [Google Scholar] [CrossRef
[6] Kapur, D. (1986) Using Gröbner Bases to Reason about Geometry Problems. Journal of Symbolic Computation, 2, 399-408. [Google Scholar] [CrossRef
[7] Buchberger, B. (1965) Ein Algorithmus zum Auffinden der Basiselemente des Restklassenringes nacheinem nulldimensionalen Polynomideal. Ph.D. Thesis, University of Innsbruck, Innsbruck.
[8] Ritirc, D., Biere, A. and Kauers, M. (2017) Column-Wise Verification of Multipliers Using Computer Algebra. Proceedings of the 17th Conference on Formal Methods in Computer-Aided Design, Vienna, 2-6 October 2017, 23-30. [Google Scholar] [CrossRef
[9] Clegg, M., Edmonds, J. and Impagliazzo, R. (1996) Using the Gröbner Basis Algorithm to Find Proofs of Unsatisfiability. Proceedings of the 28th annual ACM Symposium on Theory of Computing, Philadelphia, July 1996, 174-183. [Google Scholar] [CrossRef
[10] Ritirc, D., Biere, A. and Kauers, M. (2018) A Practical Polynomial Calculus for Arithmetic Circuit Verification. Workshop on Satisfiability Checking and Symbolic Computation, Oxford, 11 July 2018, 61-76.
[11] Becker, T., Weispfenning, V. and Kredel, H. (1993) Gröbner Bases. Springer, Berlin. [Google Scholar] [CrossRef
[12] Cox, D., Little, J. and O’Shea, D. (2015) Ideals, Varieties, and Algorithms. 4th Edition, Springer Verlag, New York.
[13] Kaufmann, D., Fleury, M. and Biere, A. (2020) Pacheck and Pasteque, Checking Practical Algebraic Calculus Proofs. FMCAD 2020, Volume 1, 264-269.
[14] Kaufmann, D. and Biere, A. (2021) Amulet 2.0 for Verifying Multiplier Circuits. 27th International Conference, TACAS 2021, Luxembourg City, 27 March-1 April 2021, 357-364. [Google Scholar] [CrossRef
[15] Kaufmann, D., Beame, P., Biere, A. and Nordström, J. (2022) Adding Dual Variables to Algebraic Reasoning for Gate-Level Multiplier Verification. 2022 Design, Automation & Test in Europe Conference & Exhibition (DATE), Antwerp, 14-23 March 2022, 1431-1436. [Google Scholar] [CrossRef