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Gerstlauer, A., Haubelt, C., Pimentel, A.D., et al. (2009) Electronic System-Level Synthesis Methodologies. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 28, 1517-1530.
http://dx.doi.org/10.1109/TCAD.2009.2026356

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  • 标题: 基于事务数据流的可重构SoC性能分析方法研究与实现Research and Implementation of Reconfigurable SoC Transaction Level Architectural Performance Analysis Based on Transaction Data Stream

    作者: 胡敏慧, 李思昆, 王观武, 杜孔飞

    关键字: 可重构SoC, 可重构协处理器, 事务数据流图, 性能分析模型, 搜索算法Reconfigurable SoC, Reconfigurable Coprocessor, Transaction Dataflow Graph, Performance Analysis Model, Search Algorithm

    期刊名称: 《Software Engineering and Applications》, Vol.4 No.6, 2015-12-28

    摘要: 粗粒度可重构体系结构由于其配置速度快、计算加速比高、适应性好、低功耗特性等优点已成为高性能可重构SoC协处理器的重要解决方案。可重构SoC的性能分析,普遍使用传统的寄存器传输级代码仿真分析方法,存在使用不方便、分析效率较低等不足之处。本文提出一种基于事务数据流图的可重构SoC性能分析方法,该方法结合应用程序数据流图与体系结构特征,构建可重构协处理器的事务数据流图并标注图节点功能属性相应的硬件性能参数;然后采用基于层次搜索的广度优先性能搜索算法,通过分析类树形结构的事务数据流图,得到可重构协处理器运行应用程序的性能分析结果。实验表明所提出的方法可以较为准确高效的分析可重构SoC体系结构应用计算性能,有助于可重构SoC早期体系结构设计和设计空间探索。 Coarse grained reconfigurable architecture has become an important solution for high performance re-configurable SoC coprocessor because of its high configuration speed, fast calculation speed, good adaptability and low power consumption. However, the traditional performance analysis method of register transfer level modeling is still widely used. To overcome the shortage of traditional performance analysis in flexibility and efficiency, we propose a new method for reconfigurable SoC performance analysis based on transaction data flow graph. This method combined application data flow graph with architectural characteristics through constructing the transaction dataflow graph of reconfigurable coprocessor and labeling hardware performance parameters corresponding to functional properties. Using the breadth first search algorithm based on hierarchical search to analyze the tree-like transaction dataflow graph, we can get the performance of reconfigurable coprocessor running applications. The result of the experiment indicates that the proposed method calculates the structure of the reconfigurable SoC quite accurately, and benefits the design of architecture and design space exploration.

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