基于事务数据流的可重构SoC性能分析方法研究与实现
Research and Implementation of Reconfigurable SoC Transaction Level Architectural Performance Analysis Based on Transaction Data Stream
DOI: 10.12677/SEA.2015.46018, PDF, HTML, XML, 下载: 2,069  浏览: 5,797  国家自然科学基金支持
作者: 胡敏慧, 李思昆, 王观武, 杜孔飞:国防科学技术大学计算机学院,湖南 长沙
关键词: 可重构SoC可重构协处理器事务数据流图性能分析模型搜索算法Reconfigurable SoC Reconfigurable Coprocessor Transaction Dataflow Graph Performance Analysis Model Search Algorithm
摘要: 粗粒度可重构体系结构由于其配置速度快、计算加速比高、适应性好、低功耗特性等优点已成为高性能可重构SoC协处理器的重要解决方案。可重构SoC的性能分析,普遍使用传统的寄存器传输级代码仿真分析方法,存在使用不方便、分析效率较低等不足之处。本文提出一种基于事务数据流图的可重构SoC性能分析方法,该方法结合应用程序数据流图与体系结构特征,构建可重构协处理器的事务数据流图并标注图节点功能属性相应的硬件性能参数;然后采用基于层次搜索的广度优先性能搜索算法,通过分析类树形结构的事务数据流图,得到可重构协处理器运行应用程序的性能分析结果。实验表明所提出的方法可以较为准确高效的分析可重构SoC体系结构应用计算性能,有助于可重构SoC早期体系结构设计和设计空间探索。
Abstract: Coarse grained reconfigurable architecture has become an important solution for high performance re-configurable SoC coprocessor because of its high configuration speed, fast calculation speed, good adaptability and low power consumption. However, the traditional performance analysis method of register transfer level modeling is still widely used. To overcome the shortage of traditional performance analysis in flexibility and efficiency, we propose a new method for reconfigurable SoC performance analysis based on transaction data flow graph. This method combined application data flow graph with architectural characteristics through constructing the transaction dataflow graph of reconfigurable coprocessor and labeling hardware performance parameters corresponding to functional properties. Using the breadth first search algorithm based on hierarchical search to analyze the tree-like transaction dataflow graph, we can get the performance of reconfigurable coprocessor running applications. The result of the experiment indicates that the proposed method calculates the structure of the reconfigurable SoC quite accurately, and benefits the design of architecture and design space exploration.
文章引用:胡敏慧, 李思昆, 王观武, 杜孔飞. 基于事务数据流的可重构SoC性能分析方法研究与实现[J]. 软件工程与应用, 2015, 4(6): 136-147. http://dx.doi.org/10.12677/SEA.2015.46018

参考文献

[1] 郭炜. SoC设计方法与实现[M]. 第2版. 北京: 电子工业出版社, 2011.
[2] Barreteau, A., Le Nours, S. and Pasquier, O. (2013) A Case Study of Simulation and Performance Evaluation of a SDR Baseband Architecture. Journal of Signal Processing Systems, 73, 267-279.
http://dx.doi.org/10.1007/s11265-013-0764-0
[3] Gerstlauer, A., Haubelt, C., Pimentel, A.D., et al. (2009) Electronic System-Level Synthesis Methodologies. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 28, 1517-1530.
http://dx.doi.org/10.1109/TCAD.2009.2026356
[4] Haid, W. and Thiele, L. (2007) Complex Task Activation Schemes in System Level Performance Analysis. 5th IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS), Salzburg, September 30 2007-October 3 2007, 173-178.
[5] Le Nours, S., Postula, A. and Bergmann, N.W. (2014) A Dynamic Computation Method for Fast and Accurate Performance Evaluation of Multi-Core Architectures. Design, Automation and Test in Europe Conference and Exhibition (DATE), Dresden, 24-28 March 2014, 1-6.
[6] Kunzli, S., Poletti, F., Benini, L. and Thiele, L. (2006) Combining Simulation and Formal Methods for System-Level Performance Analysis. Proceedings of the Design Automation and Test in Europe (Vol. 1), Munich, 6-10 March 2006, 1-6.
http://dx.doi.org/10.1109/DATE.2006.244109
[7] 杨汉侨. 基于事务级模型的SOC芯片性能分析平台的设计[D]: [硕士学位论文]. 南京: 东南大学, 2012.
[8] 孟昕, 沈海斌, 严晓浪. 基于数据流的 SoC 性能建模方法及实现[J]. 浙江大学学报: 工学版, 2011, 45(2): 314-322.
[9] Wang, G., Liu, L. and Li, S. (2014) ACRP: Application Customized Reconfigurable Pipeline. Advanced Computer Architecture. Springer Berlin Heidelberg, 16-30.
[10] 杜孔飞. 骨传导语音增强SoC的可重构流水线协处理器设计与实现[D]: [硕士学位论文]. 长沙: 国防科技大学, 2014.