基于SI分析的高速数字接口拓扑结构设计
The Topology Structure Design of High Speed Digital Interface Based on Signal Integrity Analysis
DOI: 10.12677/HJWC.2014.46016, PDF, HTML,  被引量 下载: 2,273  浏览: 5,658 
作者: 楼津甫, 张褔洪, 曾 榕:杭州电子科技大学通信工程学院,杭州
关键词: 高速互连拓扑结构仿真信号完整性High Speed Interconnect Topology Structure Simulation Signal Integrity
摘要: 为了进一步提高高速数字接口的信号完整性,文章首先介绍了几种常见的高速互连拓扑结构,并对其优劣进行简要的分析,之后利用Cadence SigXplorer PCB SI和Allegro对TMS320C0455和DDR2 (MT47H64M16)之间的高速接口电路拓扑结构进行信号完整性设计,阐述了高速电路设计过程中利用仿真工具对PCB进行前仿真的设计流程,以便于开发人员对此类高速接口的设计。
Abstract: In order to further improve the signal integrity in high speed digital interface, this paper firstly introduces several common high speed interconnect topologies and analyzes their advantages and disadvantages briefly. Then this paper also analyzes the signal integrity of high speed interconnect topology between TMS320C0455 and DDR2 (MT47H64M16) using SigXplorer PCB SI and Allegro and explains the design process of pre-simulation by tools of simulation in high speed circuit design. It will be helpful for designers to such high speed interface.
文章引用:楼津甫, 张褔洪, 曾榕. 基于SI分析的高速数字接口拓扑结构设计[J]. 无线通信, 2014, 4(6): 99-106. http://dx.doi.org/10.12677/HJWC.2014.46016