基于时钟树机制的高相位分辨率矢量信号源研究

Research on High Phase Resolution Vector Signal Source Based on Clock Tree Mechanism

摘要: 在高速矢量信号源系统架构中，并行交织输出的数模转换器(Digital-to-Analog Converter, DAC)结构虽被广泛应用于缓解采样速率与采样精度之间的固有矛盾，但系统极易受各通道采样时钟抖动的影响。本文分析了采样时钟抖动与采样有效位数之间的关系，设计了一种基于时钟树机制的并联DAC交织输出结构的高相位分辨率矢量信号源系统。实验验证结果表明，在相同的测试条件下，相较于传统单块DAC矢量信号源系统，所提系统的输出速率提升了4倍，信噪比实现了约4.5 dB的提高。

Abstract: In the architecture of high-speed vector signal generator systems, the parallel interleaved Digital-to-Analog Converter (DAC) structure is widely employed to mitigate the inherent trade-off between sampling rate and sampling precision. However, such systems are highly susceptible to the impact of sampling clock jitter across multiple channels. This paper analyzes the relationship between sampling clock jitter and the Effective Number of Bits (ENOB). A high-phase-resolution vector signal generator system based on a clock tree-mechanized parallel DAC interleaved output structure is proposed. Experimental validation results demonstrate that, under identical test conditions, the proposed system achieves a fourfold increase in output rate and an approximately 4.5 dB improvement in Signal-to-Noise Ratio (SNR) compared to the traditional single-DAC vector signal generator system.