面向模拟电路设计的大模型检索增强与仿真反馈闭环框架

A Closed-Loop LLM Framework with Retrieval Augmentation and Simulation Feedback for Analog Circuit Design

摘要: 大语言模型为自然语言驱动的电路设计提供了新的交互方式，但在模拟电路场景中，模型输出仍容易受到器件库缺失、参数不匹配和仿真不可通过等问题影响。针对自然语言需求难以直接转化为可执行网表的问题，本文设计了一种检索增强与仿真反馈相结合的模拟电路生成流程。该流程首先将用户需求整理为结构化元器件清单，再通过精确别名匹配和向量语义检索将抽象器件映射到KiCad符号库中的可用元件，随后依据匹配结果生成SPICE网表，并由设计者结合Ngspice仿真结果进行反馈修正。该方法强调工具链可用性与人工可控性，在避免复杂多智能体编排的同时保留了从需求理解、器件落地到仿真验证的闭环。基于5类典型模拟电路的实验表明，DeepSeek-V3.2后端下该流程取得86.7%的仿真通过率和3.1%的平均目标偏差，说明该方案能够提升LLM生成模拟电路的可执行性和指标贴合度。

Abstract: Large language models (LLMs) often struggle to generate executable analog circuit netlists due to component mismatches and simulation failures. To address this, we propose a closed-loop workflow integrating retrieval augmentation and simulation feedback. The system parses user requirements into structured lists, maps abstract devices to KiCad libraries via exact alias and vector semantic retrieval, and generates SPICE netlists. Designers then iteratively refine these netlists using Ngspice simulation feedback. This highly controllable, human-in-the-loop approach avoids complex multi-agent orchestration while ensuring practical usability. Evaluated on five typical analog circuits using DeepSeek-V3.2, our method achieved an 86.7% simulation pass rate and a 3.1% average target deviation, demonstrating significantly improved executability and metric alignment for LLM-generated circuits.