基于AI辅助工程的混合MCU–边缘–云平台的工业AIoT系统设计与实现

AI-Assisted Engineering for Developing a Hybrid MCU-Edge-Cloud Industrial AIoT System

摘要: 文章提出一种面向混合微控制器–边缘–云端架构工业AIoT系统的嵌入式AI辅助工程化方法(AI-Assisted Engineering for embedded systems)，用于支持嵌入式软件、RTOS定制、传感器信息模型、通信协议、边缘轻量级学习算法、云端协议及数据挖掘的协同开发，以区别于仅依赖提示生成代码的“氛围编程”(Vibe Coding)。文章以“项目速度”(Project Velocity)原型系统(STM32、RK3588与ThingsBoard)为参考实现，展示了从裸硬件起步、在AI辅助工程化方法下完成端到端软件系统构建的全过程。该架构将信号采集、预处理及故障安全行为部署于微控制器传感器节点，将协议转换、上下文融合、本地推理、数据缓冲、轻量级机器学习及人机交互功能部署于边缘网关，将数据分析、模型注册、受控空中升级(OTA)及运维管理部署于云端。针对嵌入式开发中“AI提示优先”方式易引发的硬件映射缺失、时序约束不清、跨层配置不一致及不安全输出等问题，文章提出面向Zephyr RTOS的“三文件”提示策略，要求AI同时生成硬件覆盖文件(.overlay/.dts)、项目配置文件(prj.conf)和主程序文件(main.c)，从而建立硬件定义、系统配置与应用逻辑之间的闭环。进一步地，文章构建了覆盖需求、实现、验证、文档与部署的规范化工作流程，并结合人工审查、回归测试、硬件在环验证、安全扫描和受控滚动发布等机制，提高系统的可验证性、可维护性与部署可靠性。最后，结合预测性维护用例与多维评价框架，讨论了该方法在实际部署及后续规模化验证中的应用价值。

Abstract: This paper proposes AI-Assisted Engineering, a structured AI-supported implementation methodology for industrial AIoT systems built on a hybrid microcontroller-edge-cloud architecture. The method supports the coordinated development of embedded software, RTOS customization, sensor information models, communication protocols, lightweight edge learning algorithms, cloud protocols, and data mining, and is intended to address the limitations of prompt-first “vibe coding.” Using the Project Velocity prototype system (STM32, RK3588, and ThingsBoard) as a reference implementation, the paper presents an end-to-end software development process that starts from bare hardware and is completed with AI assistance. In the proposed architecture, signal acquisition, preprocessing, and fail-safe behaviors are assigned to microcontroller-based sensor nodes; protocol translation, context fusion, local inference, data buffering, lightweight machine learning, and human-machine interaction are handled by the edge gateway; while data analytics, model registration, controlled over-the-air (OTA) updates, and system management are deployed in the cloud. To mitigate common issues in AI-prompt-driven embedded development—particularly missing hardware mappings, unclear timing constraints, cross-layer inconsistencies, and unsafe outputs—the paper introduces a three-file prompting strategy for Zephyr RTOS, requiring AI-generated deliverables to include a hardware overlay file (.overlay/.dts), a project configuration file (prj.conf), and an application source file (main.c). This strategy establishes a closed loop between hardware definition, system configuration, and application logic. The paper further presents a standardized workflow covering requirements, implementation, verification, documentation, and deployment, reinforced by human review, regression testing, hardware-in-the-loop validation, security scanning, and controlled rolling release. Finally, a predictive maintenance use case and a multi-dimensional evaluation framework are discussed to support practical deployment and future large-scale validation.