基于FPGA的智能交通灯控制系统设计
Design of Intelligent Traffic Light Control System Based on FPGA
DOI: 10.12677/OJCS.2021.102002, PDF,  被引量   
作者: 赵 磊：成都信息工程大学工程实践中心，四川 成都
关键词: FPGA；智能交通控制系统；VHDL硬件语言；FPGA； Intelligent Traffic Control System； VHDL Language
摘要: 一直以来，传统的红绿灯是采用固定时长方式进行路面交通控制，是成熟有效的系统，具有通行效率不高的缺点。为优化路口的车辆通行，本文设计了一种自动感知的交通光控制器系统(ATLC)，对道路交通流进行了研究。该方法利用通行高峰和低谷不同数据，可以有效地减少非高峰时段的等待时间，包括紧急情况和VIP车辆通行以及行人的安全也都可考虑在内。本文设计的低成本自动交通灯控制系统，为地面通行提供了稳定的交通流量。该系统利用VHDL语言进行开发，使用时序仿真进行测试。该系统能够检测不同时刻车辆通过率，调节相对应的交通灯时间长度随之变化，实现对红绿灯的智能调节。利用此智能调节控制路面交通，可使主支干道协调配合，从而提高路口的通行效率。
Abstract: For all the times, the traditional method of fixed length of traffic light for road traffic control has long been a proven and effective system, but it has the disadvantage of low traffic efficiency. In or-der to optimize traffic at intersections, a traffic light controller (ATLC) system based on flow sensing is studied, and the traffic flow is discussed. This method takes advantage of peak and slump trough traffic slots to effectively reduce waiting times during off-peak hours, including emergencies and VIP vehicle passes and pedestrian safety. The low-cost automatic traffic light control system de-signed in this paper provides a stable traffic flow for ground traffic. The system is developed with VHDL and tested by time series simulation. The system can realize the intelligent regulation of the traffic light, detect the arrival rate of vehicles at different times, so that the corresponding length of the traffic light configuration time changes accordingly, so as to intelligently regulate and control the road traffic, so that the main and branch roads coordinate, thus improving the efficiency of the intersection.
文章引用：赵磊. 基于FPGA的智能交通灯控制系统设计[J]. 电路与系统, 2021, 10(2): 7-13. https://doi.org/10.12677/OJCS.2021.102002

参考文献

[1] Su, K., Li, J. and Fu, H. (2011) Smart City and the Applications. 2011 International Conference on Electronics, Com-munications and Control (ICECC), Ningbo, 9-11 September 2011, 1028-1031. [Google Scholar] [CrossRef] 
[2] Nagel, K., Wagner, P. and Woesler, R. (2003) Still Flowing: Approaches to Traffic Flow and Traffic Jam Modeling. Operations Research, 51, 681-710. [Google Scholar] [CrossRef] 
[3] Sugiyama, Y., Fukui, M., Kikuchi, M., et al. (2008) Traffic Jams without Bottlenecks—Experimental Evidence for the Physical Mechanism of the Formation of a Jam. New Journal of Physics, 10, Article ID: 033001. [Google Scholar] [CrossRef] 
[4] de Souza, A.M. and Villas, L.A. (2015) A New Solution Based on Inter-Vehicle Communication to Reduce Traffic Jam in Highway Environment. IEEE Latin America Transac-tions, 13, 721-726. [Google Scholar] [CrossRef] 
[5] Lindner, F., Kressel, U. and Kaelberer, S. (2004) Robust Recogni-tion of Traffic Signals. IEEE Intelligent Vehicles Symposium, Parma, 14-17 June 2004, 49-53.
[6] Bazzan, A.L.C., De Oliveira, D. and da Silva, B.C. (2010) Learning in Groups of Traffic Signals. Engineering Applications of Artificial Intel-ligence, 23, 560-568. [Google Scholar] [CrossRef] 
[7] Lahade, S.V. and Hirekhan, S.R. (2015) Intelligent and Adaptive Traffic Light Controller (IA-TLC) Using FPGA. 2015 International Conference on Industrial Instrumentation and Control (ICIC) IEEE, Pune, 28-30 May 2015, 618-623. [Google Scholar] [CrossRef] 
[8] Nath, S., Pal, C., Sau, S., et al. (2012) Design of an FPGA Based Intelligence Traffic Light Controller with VHDL. 2012 International Conference on Radar, Communication and Compu-ting (ICRCC) IEEE, Tiruvannamalai, 21-22 December 2012, 92-97. [Google Scholar] [CrossRef] 
[9] Dilip, B., Alekhya, Y. and Bharathi, P.D. (2012) FPGA Im-plementation of an Advanced Traffic Light Controller Using Verilog HDL. International Journal of Advanced Research in Computer Engineering & Technology (IJARCET), 1, 1.
[10] El-Medany, W.M. and Hussain, M.R. (2007) FPGA-Based Advanced Real Traffic Light Controller System Design. 2007 4th IEEE Workshop on Intelligent Data Ac-quisition and Advanced Computing Systems: Technology and Applications, Dortmund, 6-8 September 2007, 100-105. [Google Scholar] [CrossRef] 
[11] Kishore, S.V., Sreeja, V., Gupta, V., et al. (2017) FPGA Based Traffic Light Controller. 2017 International Conference on Trends in Electronics and Informatics (ICEI), Tiru-nelveli, 11-12 May 2017, 469-475. [Google Scholar] [CrossRef] 
[12] Singh, S. and Badwaik, S.C. (2011) Design and Implementation of FPGA-Based Adaptive Dynamic Traffic Light Controller. 2011 International Conference on Emerging Trends in Networks and Computer Communications (ETNCC), Udaipur, 22-24 April 2011, 324-330. [Google Scholar] [CrossRef] 
[13] Kaur, S., Varshitha, V., Siddharth, J., et al. (2018) Adaptive Traffic Light Controller Using FPGA. 2018 3rd IEEE International Conference on Recent Trends in Electronics, Infor-mation & Communication Technology (RTEICT), Bangalore, 18-19 May 2018, 1612-1617. [Google Scholar] [CrossRef] 
[14] Swapna, B., Javeed, M. and Ramesh, G. (2015) FPGA-Based Advanced Traffic Light Controller Simulation.
[15] Sachdeva, S., Chowdhury, S., Shekhar, S., et al. (2018) Design and Implementation of a Green Traffic Light Controller on FPGA Using VHDL. In: System and Archi-tecture, Springer, Singapore, 187-192. [Google Scholar] [CrossRef] 
[16] Palnitkar, S. (2003) Verilog HDL: A Guide to Digital Design and Synthesis. Prentice Hall Professional, Hoboken.
[17] Shokrolah-Shirazi, M. and Miremadi, S.G. (2008) FPGA-Based Fault Injection into Synthesizable Verilog HDL Models. 2008 Second International Conference on Secure System Integration and Reliability Improvement, Yokohama, 14-17 July 2008, 143-149. [Google Scholar] [CrossRef] 
[18] Jamieson, P., Kent, K.B., Gharibian, F., et al. (2010) Odin II—An Open-Source Verilog HDL Synthesis Tool for Cad Research. 2010 18th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, Char- lotte, 2-4 May 2010, 149-156. [Google Scholar] [CrossRef] 
[19] Takamaeda-Yamazaki, S. (2015) Pyverilog: A Python-Based Hard-ware Design Processing Toolkit for Verilog HDL. In: International Symposium on Applied Reconfigurable Computing, Springer, Cham, 451-460. [Google Scholar] [CrossRef] 
[20] Anitha, K. and Sujatha, B.K. (2014) FPGA Implementation of High Throughput Digital QPSK Modulator Using Verilog HDL. International Journal of Advanced Computer Research, 4, 217.